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INTEGRATED CIRCUITS
DATA SHEET
SAA5246A Integrated VIP and Teletext (IVT1.0)
Product specification Supersedes data of August 1992 File under Integrated Circuits, IC02 January 1993
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
FEATURES * Complete Teletext decoder in a 48-pin DIL or 64-pin QFP, integrated circuit * Single +5 V power supply * Both video and scan related synchronization modes are supported * RGB interface to standard colour decoder ICs, push-pull output drive * Digital data slicer and display clock phase-locked loop reduce peripheral components to a minimum * Data capture performance similar to SAA5231 (VIP2) * Option for up to seven national languages * Optional storage of packet 24 in the display memory * Separate text and video signal quality detectors, 625/525 video status and language version all readable via I2C-bus * Automatic ODD/EVEN output control with override * Control of display PLL free-run and rolling header via I2C-bus * VCS to SCS mode for stable 525 line status display. QUICK REFERENCE DATA SYMBOL VDD IDD Vsyn Vvid fXTAL Tamb supply current sync amplitude video amplitude crystal frequency operating ambient temperature PARAMETER positive supply voltage - 0.1 0.7 - -20 MIN. 4.5 64 0.3 1.0 27 - TYP. 5.0 DESCRIPTION
SAA5246A
The SAA5246A is a single-chip teletext decoder IC for decoding 625 line base World System Teletext transmissions. The teletext decoder hardware is based on the Enhanced Computer Controlled ECCT device (SAA5243) with some additional features. The Video Input Processor section of the device uses mixed analog and digital designs in the data slicer and clock phase-locked-loop functions. As a result the number of external components are greatly reduced and no critical or adjustable components are required.
MAX. 5.5 128 0.6 1.4 - +70 V
UNIT mA V V MHz C
ORDERING INFORMATION EXTENDED TYPE NUMBER SAA5246AP SAA5246AGP Notes 1. SOT240-1; 1996 November 22. 2. SOT319-3; 1996 November 22. PACKAGE PINS 48 64 PIN POSITION DIL QFP MATERIAL plastic plastic CODE SOT240AC3(1) SOT319DA3(2)
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
Y
handbook, full pagewidth
BLAN
COR RGBREF RGB ODD / EVEN
22
19
20
18
15-17
21 48
WE
DISPLAY 47 MEMORY INTERFACE 3446 A0 - A12 OE
D0 - D7 DATA SLICER AND CLOCK REGENERATOR TELETEXT ACQUISITION AND DECODING 2633
24 I 2 C-BUS INTERFACE DCVBS 1, 6, 10 23
SDA SCL
SAA5246A
ANALOG TO DIGITAL CONVERTER TIMING CHAIN
VDD VSS
25 5, 14
CVBS
OSCOUT OSCIN
2 3 CRYSTAL OSCILLATOR
INPUT CLAMP AND SYNC SEPARATOR
DISPLAY CLOCK PHASE LOCKED LOOP 11 13 12
MLA840
4
7
9
8
OSCGND
BLACK IREF CVBS POL VCR / FFB STTV / LFB
Fig.1 Block diagram for SOT240 (DIL48) package.
January 1993
3
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
PINNING PIN SYMBOL SOT240 OSCOUT OSCIN OSCGND VSS BLACK CVBS IREF VDD POL STTV/LFB VCR/FFB R G B RGBREF BLAN COR 2 3 4 5, 14, 25 7 8 9 1, 6, 10 11 12 13 15 16 17 18 19 20 SOT319 27 28 29 26, 30, 31, 43, 58 35 36 37 25, 32, 38 39 40 42 44 45 47 48 52 53 27 MHz crystal oscillator output 27 MHz crystal oscillator input 0 V crystal oscillator ground 0 V ground DESCRIPTION
SAA5246A
video black level storage pin, connected to ground via a 100 nF capacitor composite video input pin. A positive-going 1 V (peak-to-peak) input is required, connected via a 100 nF capacitor reference current input pin, connected to ground via a 27 k resistor +5 V positive supply STTV/LFB/FFB polarity selection pin sync to TV output pin/line flyback input pin. Function controlled by an internal register bit (scan sync mode) PLL time constant switch/field input pin. Function controlled by an internal register bit (scan sync mode) dot rate character output of the RED colour information dot rate character output of the GREEN colour information dot rate character output of the BLUE colour information input DC voltage to define the output high level on the RGB pins dot rate fast blanking output programmable output to provide contrast reduction of the TV picture for mixed text and picture displays or when viewing newsflash/subtitle pages. Open-drain output a 25 Hz output synchronized to the input CVBS field sync pulses to make a non-interlaced display by adjustment of the vertical deflection currents. dot rate character output of teletext foreground colour information. Open-drain output serial clock input for I2C-bus. It can still be driven HIGH during power-down of the device serial data port for the I2C-bus. Open drain output. It can still be driven HIGH during power-down of the device data ports for the page SRAM not connected
ODD/EVEN Y SCL SDA D0-D5 n.c.
21 22 23 24 26-31 -
54 55 56 57 60-64, 3 1, 2, 10, 11, 15, 18, 33, 34, 41, 46, 49 - 51, 59 4, 5
D6-D7
32, 33
data ports for the page SRAM
January 1993
4
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
PIN SYMBOL SOT240 A0-A12 34-46 SOT319 6-9, 12-14, 16, 17, 19-22 23 24 address output for the page SRAM DESCRIPTION
OE WE
47 48
output enable for the page SRAM write enable for the page SRAM
January 1993
5
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
handbook, halfpage
V DD OSCOUT OSCIN OSCGND VSS V DD BLACK CVBS IREF
1 2 3 4 5 6 7 8 9
48 WE 47 OE 46 45 44 A12 A11 A10
43 A9 42 A8 41 A7 40 A6 39 A5 38 A4 37 A3 SAA5246A 36 A2 35 A1 34 A0 33 D7 32 D6 31 D5 30 D4 29 D3 28 D2 27 D1 26 D0 25 VSS
MLA841
V DD 10 POL 11
STTV / LFB 12 VCR / FFB 13 VSS 14
R 15 G 16 B 17 RGBREF 18 BLAN 19 COR 20 ODD / EVEN 21 Y 22 SCL 23 SDA 24
Fig.2 Pin configuration; SOT240 (DIL48).
January 1993
6
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
54 ODD / EVEN
57 SDA
58 VSS
56 SCL
handbook, full pagewidth
55 Y
59
52 51 50 49 48 RGBREF n.c. 47 B 46 n.c. 45 G 44 R 43 VSS 42 VCR / FFB 41 n.c. 40 STTV / LFB 39 POL 38 V DD 37 IREF 36 CVBS 35 BLACK 34 n.c. 33 n.c. V DD 32
index corner
n.c. n.c. D5 D6 D7 A0 A1 A2 A3
1 2 3 4 5 6 7 8 9 SAA5246A
n.c. 10 n.c. 11 A4 12 A5 13 A6 14 n.c. 15 A7 16 A8 17 n.c. 18 A9 19 A10 20 A11 21 A12 22 OE 23 WE 24
V DD 25
VSS 26
OSCOUT 27
28
OSCGND 29
V SS 30
OSCIN
V SS 31
53 COR
64 D4
63 D3
62 D2
61 D1
60 D0
n.c.
BLAN
MLA843
Fig.3 Pin configuration; SOT319 (QFP64).
January 1993
7
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
LIMITING VALUES In accordance with Absolute Maximum System (IEC 134) SYMBOL VDD VI VO IO IIOK Tamb Tstg Vstat PARAMETER supply voltage (all supplies) input voltage (any input) output voltage (any output) output current (each output) DC input or output diode current operating ambient temperature storage temperature electrostatic handling (see note 1) -0.3 -0.3 -0.3 - - -20 -55 -2000 MIN. 6.5
SAA5246A
MAX. V V V VDD +0.5 VDD +0.5 10 20 +70 +125 +2000
UNIT
mA mA C C V
Note to the Limiting values 1. Electrostatic handling is equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor with a 15 ns rise time. Failure Rate The failure rate at Tamb = 55 C will be a maximum of 1000 FITS (1 FIT = 1 x 10-9 failures per hour).
January 1993
8
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
CHARACTERISTICS VDD = 5 V 10%; Tamb = -20 to +70 C, unless otherwise specified SYMBOL Supplies VDD IDD Inputs CVBS Vsyn tsyn sync amplitude delay from CVBS to TCS output from STTV buffer (nominal video, average of leading/trailing edge) change in sync delay between all black and all white video input at nominal levels video input amplitude (peak-to-peak) display PLL catching range Zsrc CI IREF Rg POL VIL VIH ILI CI LFB VIL VIH ILI II tLFB VCR/FFB VIL VIH ILI II LOW level input voltage HIGH level input voltage input leakage current input current VI = 0 to VDD note 1 -0.3 2.0 -10 -1 - - - - LOW level input voltage HIGH level input voltage input leakage current input current delay between LFB front edge and input video line sync VI = 0 to VDD note 1 -0.3 2.0 -10 -1 - - - - - 250 LOW level input voltage HIGH level input voltage input leakage current input capacitance VI = 0 to VDD -0.3 2.0 -10 - - - - - resistor to ground - 27 - source impedance input capacitance 0.1 -150 0.3 0 supply voltage range total supply current 4.5 - 5.0 64 PARAMETER CONDITIONS MIN. TYP.
SAA5246A
MAX.
UNIT
5.5 128
V mA
0.6 +150
V ns
tsyd
0
-
25
ns
Vvid(p-p)
0.7 7 - -
1.0 - - -
1.4 - 250 10
V % pF
k
+0.8 VDD+0.5 +10 10
V V A pF
+0.8 VDD+0.5 +10 +1 -
V V A mA ns
+0.8 VDD+0.5 +10 +1
V V A mA
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
SYMBOL RGBREF VIL ILI IDC SCL VIL VIH ILI fSCL tr tf CI
PARAMETER
CONDITIONS
MIN. -0.3 - - - - - - - - - -
TYP.
MAX.
UNIT
LOW level input voltage input leakage current DC current VI = 0 to VDD
VDD+0.5 +10 10
V A mA
-10 - -0.3 3.0
LOW level input voltage HIGH level input voltage input leakage current clock frequency input rise time input fall time input capacitance 10% to 90% 90% to 10% VI = 0 to VDD
+1.5 VDD+0.5 +10 100 2 2 10
V V A kHz s s pF
-10 0 - - -
Inputs/outputs CRYSTAL OSCILLATOR (OSCIN; OSCOUT) fXTAL VOSC Gv Gm CI CFB BLACK Cblk ILI SDA VIL VIH ILI CI tr tf VOL tf CL LOW level input voltage HIGH level input voltage input leakage current input capacitance input rise time input fall time LOW level output voltage output fall time load capacitance 10% to 90% 90% to 10% IOL = 3 mA 3 V to 1 V VI = 0 to VDD -0.3 3.0 -10 - - - 0 - - - - - - - - - - - +1.5 VDD+0.5 +10 10 2 2 0.5 200 400 V V A pF s s V ns pF storage capacitor to ground input leakage current VI = 0 to VDD - -10 100 - - +10 nF A crystal frequency oscillation amplitude (peak-to-peak value) small signal voltage gain mutual conductance input capacitance feedback capacitance - - - 5 - - 27 1.5 1 - - 1 - - - - 10 - MHz V V/V mA/V pF pF
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
SYMBOL D0 TO D7 VIL VIH ILI CI VOL VOH tr tf CL Outputs STTV Gstt Vtcs VDCs IO CL VOL VOH CL tr tf OE, WE VOL VOH CL tr tf
PARAMETER
CONDITIONS
MIN. -0.3 2.0 -10 - - - - - - - - - -
TYP.
MAX.
UNIT
LOW level input voltage HIGH level input voltage input leakage current input capacitance LOW level output voltage HIGH level output voltage output rise time output fall time load capacitance IOL = +1.6 mA IOH = -0.2 mA 0.6 V to 2.2 V 2.2 V to 0.6 V
+0.8 VDD+0.5 +10 10 0.4 VDD 50 50 120
V V A pF V V ns ns pF
0 2.4 - - -
gain of STTV relative to video input TCS amplitude DC shift between TCS output and nominal video output output drive current load capacitance IOL = +1.6 mA IOH = -0.2 mA 0.6 V to 2.2 V 2.2 V to 0.6 V IOL = +1.6 mA IOH = -0.2 mA 0.6 V to 2.2 V 2.2 V to 0.6 V
0.9 0.2 - - - 0 2.4 - - - 0 2.4 - - -
1.0 0.3 - - - - - - - - - - - - -
1.1 0.45 0.15 3.0 100 V V mA pF
A0 TO A12 ADDRESS OUTPUT TO MEMORY LOW level output voltage HIGH level output voltage load capacitance output rise time output fall time 0.4 VDD 120 50 50 V V pF ns ns
LOW level output voltage HIGH level output voltage load capacitance output rise time output fall time
0.4 VDD 120 50 50
V V pF ns ns
January 1993
11
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
SYMBOL R, G AND B VOL VOH
PARAMETER
CONDITIONS
MIN. -
TYP.
MAX.
UNIT
LOW level output voltage HIGH level output voltage
IOL = 2 mA IOH = -1.6 mA; RGBREF VDD-2 V; note 2
0 RGBREF -0.25 V - - -
0.2 RGBREF +0.25 V -3.3 200 50 20 20
V V
RGBREF
IDC |Zo| CL tr tf BLAN VOL VOH VOH CL tr tf ODD/EVEN VOL VOH CL tr tf VOH VOL VOL CL tf
DC current output impedance load capacitance output rise time output fall time 10% to 90% 90% to 10%
- - - - - - - - - - - - - - - - - - - - -
mA pF ns ns
- - 0 1.1 - -
LOW level output voltage HIGH level output voltage HIGH level output voltage load capacitance output rise time output fall time
IOL = 0.2 mA IOH = -0.2 mA; VDD = 4.5 V; note 2 IOH = 0 mA; VDD = 5.5 V; note 2 10% to 90% 90% to 10%
0.4 - 2.8 50 20 20
V V V pF ns ns
- - 0 VDD-0.4 - - - -
LOW level output voltage HIGH level output voltage load capacitance output rise time output fall time
IOL = +1.6 mA IOH = -1.6 mA 0.6 to 2.2 V 2.2 to 0.6 V
0.4 VDD 120 50 50
V V pF ns ns
COR AND Y (OPEN DRAIN) pull-up voltage at pin LOW level output voltage LOW level output voltage load capacitance output fall time IOL = +2 mA IOL = +5 mA VDD 0.4 1.0 25 50 V V V pF ns 0 0 - load resistor of 1.2 k - to VDD; measured between VDD -0.5 and 1.5 V VI = 0 to VDD -10 -
ILO TSK
output leakage current skew delay between display outputs R, G, B, COR, Y and BLAN
- -
+10 20
A ns
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
SYMBOL Timing MEMORY INTERFACE tCY tOE tADDR trOEW twOEW tACC tDH tWEW tDS tDHWE tWR tDE I2C-BUS tLOW tHIGH tSU;DAT tHD;DAT tSU;STO tBUF tHD;STA tSU;STA
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
cycle time address change to OE LOW address active time OE pulse width read OE pulse width write access time from address data valid data hold time from OE HIGH or address change WE pulse width data set-up time to WE HIGH data hold time from WE HIGH write recovery time data enable from WE LOW
- 55 450 295 100 - 0 100 60 20 20 60
500 - 500 - - - - - - - - - - - - - - - - -
- - - - - 150 150 - - - - - - - - - - - - -
ns ns ns ns ns ns ns ns ns ns ns ns s s ns ns s s s s
clock LOW period clock HIGH period data set-up time data hold time set-up time from clock HIGH to STOP START set-up time following a STOP START hold time START set-up time following clock LOW-to-HIGH transition
4 4 250 170 4 4 4 4
Notes to the characteristics 1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs. Series current limiting resistors must be used to limit the input currents to 1 mA. 2. Can be pulled higher by external pull-up resistor, (maximum leakage current 200 A).
January 1993
13
TCS is available on STTV/LFB pin. [1] LSP, EP and BP are combined to give TCS as shown below. All timings measured from falling edge of LSP.
[2]
Line numbers placed in the middle of the line. Equivalent count numbers in brackets.
Product specification
SAA5246A
Fig.4 Composite sync waveforms.
handbook, full pagewidth
January 1993
4.66 64 s 32 34.33 64 s 27.33 32 59.33 64 s
Philips Semiconductors
0
LSP (Line Sync Pulse)
0 2.33
EP (Equalizing Pulse)
0
BP (Broad Pulse)
Integrated VIP and Teletext (IVT1.0)
[1]
621 (308) 622 (309) 1 2 3 4 5 6
623 (310)
624 (311)
625 (312)
7
14
309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 308 309 310 311 312 1 2 3 4 5 6
TCS interlaced
319 (6)
320 (7)
TCS interlaced
7
TCS non-interlaced
MLA037 - 2
[2]
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
handbook, full pagewidth LSP
(TCS) 0 4.66 40 s R, G, B, Y (1) 0 16.67 display period 64 s
(a) LINE RATE
56.67 s
lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced) R, G, B, Y (1) 0 41 display period
(b) FIELD RATE
312 291 line numbers
MLA662 - 1
(1) also BLAN in character and box blanking
Fig.5 Display output timing (a) line rate (b) field rate.
handbook, full pagewidth
SDA
t BUF
t LOW
tf
SCL t HIGH t SU;DAT
t HD;STA
tr
t HD;DAT
SDA
MBC764
t SU;STA
t SU;STO
Fig.6 I2C-bus timing.
January 1993
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(1) or 62 s if R1 D2.D1.D0 = 111. (2) Line numbers placed in the middle of the line. Equivalent count numbers in brackets.
Product specification
SAA5246A
Fig.7 ODD/EVEN timing.
handbook, full pagewidth
January 1993
FIRST FIELD START (EVEN)
622 (309) 1 7 2 3 4 5 6 623 (310) 624 (311) 625 (312) 2 s 48 s
Philips Semiconductors
621 (308)
TCS interlaced
ODD / EVEN output (normal sync mode)
ODD / EVEN output (normal sync mode when VCS to SCS mode active)
Integrated VIP and Teletext (IVT1.0)
ODD / EVEN output (slave sync mode) 30 s (1)
16
SECOND FIELD START (ODD)
310 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 311 312 313 2 s 16 s
309
319 (6)
320 (7)
TCS interlaced
ODD / EVEN output (normal sync mode)
ODD / EVEN output (normal sync mode when VCS to SCS mode active)
ODD / EVEN output (slave sync mode)
(2)
30 s (1)
MLA416 - 2
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
handbook, full pagewidth
t CY ADDRESS A0 - A12 valid t ADDR t rOEW
t OE OE
t ACC DATA FROM RAM (a) READ t CY ADDRESS A0 - A12 t OE OE t wOEW WE t WEW t DE t DS DATA TO RAM t ACC DATA FROM RAM valid valid t DHWE t WR valid valid
t DH
MBA468 - 2
(b)
WRITE
_ _ _ _ Level during flicker stopped cycle.
Fig.8 Memory interface timing (a) read (b) write.
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
APPLICATION INFORMATION
SAA5246A
handbook, full pagewidth
22 nF
10 F
5V
V DD
1
48
WE
OSCOUT 10 pF 1 nF 3.3 k 4.7 H 27 MHz 3rd overtone 100 nF 15 pF OSCIN
2
47
OE A0 - A12 8 K x 8-bit SRAM
3
34 - 46 D0 - D7
OSCGND V SS C4 100 nF V DD
4
26 - 33 VSS C7 100 nF 5V V DD
5
5V C5 100 nF
6
BLACK
7
C6 video input 100 nF
CVBS R2 27 k
8
IREF V DD
9
5V 5V 100 nF 33 F
10
POL STTV / LFB
11 12 SAA5246A
sync output
VCR / FFB V SS
13
14
R
15
G 5V B (1) (1) (1) BLAN RGBREF
16
17
18
19
COR 2.7 k 5V Y 2.7 k 5V SDA SCL ODD / EVEN
20
21
22
23 VSS
24
25
MLA844 - 3
(1) Value dependent on application
Fig.9 Application diagram (SOT240).
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A page memory organization
SAA5246A
The organization of the page memory is illustrated by Fig.10. The SAA5246A provides an additional row as compared with first generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page; row 24 is the extra row available for software generated status messages and FLOF/FASTEXT prompt information.
handbook, full pagewidth
7 characters for status 7 1
24 characters from page header rolling when display page looked for 24
8 characters always rolling (time) 8 ROW 0 1
fixed character written by IVT hardware alphanumerics white for normal alphanumerics green when looking for display page
2 3 4
MAIN PAGE DISPLAY AREA
5 to 20
21 PACKET X/22 PACKET X/23 PACKET X/24 STORED HERE IF R1D7 = 1 10 10 bytes for received page information 14 14 bytes free for microprocessor 22 23 24 25
MLA845 - 1
Fig.10 Basic page memory organization.
Note to Fig.10 Row 0 Row 0 is for the page header. The first seven columns (0 to 6) are free for status messages. The eighth is an alphanumeric white or green control character, written automatically by SAA5246A to give a green rolling header when a page is being looked for. The last eight characters are for rolling time. Row 25 The first 10 bytes of Row 25 contain control data relating to the received page as shown in Table 1. The remaining 14 bytes are free for use by the microprocessor.
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 1 D0 D1 D2 D3 D4 D5 D6 D7 Column Row 25 received control data format. PU0 PU1 PU2 PU3 0 0 0 0 PT0 PT1 PT2 PT3 0 0 0 1 MU0 MU1 MU2 MU3 0 0 0 2 MT0 MT1 MT2 C4 0 0 0 3 HU0 HU1 HU2 HU3 0 0 0 4 HT0 HT1 C5 C6 0 0 0 5 C7 C8 C9 C10 0 0 0 6 C11 C12 C13 C14 0 0 0 7
SAA5246A
MAG0 MAG1 MAG2 0 0 0 0 8
0 0 0 0 0 PBLF 0 0 9
HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER FOUND
Where: Page number MAG PU PT PBLF FOUND HAM.ER Page sub-code MU MT HU HT C4-C14 minutes units minutes tens hours units hours tens transmitted control bits. magazine page units page tens page being looked for LOW for page has been found Hamming error in corresponding byte
When in extension packet enabled mode the rows of information are organized as illustrated by Fig.11. Row 23 of the extension page, as shown in Fig.11, contains packet 8/30. Packet 8/30 is mapped into the SAA5246A memory as follows: 8/30/0 and 8/30/1 to Chapter 4 Row 23 8/30/2 and 8/30/3 to Chapter 5 Row 23 8/30/4 to 8/30/15 to Chapter 6 Row 23
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
ROW
handbook, full pagewidth
PACKETS X/26/0 - X/26/14
0 to 14
PACKET
X/28/2
15 16 17 18
PACKETS X/27/0 - X/27/1
PACKETS X/27/4 - X/27/5 PACKET X/24 IF R0D7 = 0 X/25 X/28/0 8/30 X/28/1
19 20 21 22 23 24 25
PACKET PACKET PACKET PACKET
MLA846 - 1
Fig.11 Organization of the extension memory.
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Register maps
SAA5246A
SAA5246A mode registers R0 to R11 are shown in Table 2. R0 to R10 are WRITE only; R11 is READ/WRITE; R11B is READ only. Register map (R3), for page requests, is shown in detail in Table 4. Table 2 Register map. D7 X24 POS D6 FREE RUN PLL D5 D4 - D3 D2 DISABLE ODD/EVEN D1 VCR MODE D0 R11/ R11B SELECT T0
REGISTER Adv. control 0
DISABLE AUTO ODD/EVEN HDR ROLL ACQ ON/OFF ACQ CIRCUIT A1 - EXT. PACKET ENABLE ACQ CIRCUIT A0 PRD4
Mode
1
VCS TO 7 + P/ SCS 8-BIT HAM. CHECK - BANK SELECT A2 -
DEW/ FULL FIELD TB
TCS ON FFB MODE START COLUMN SC2 PRD2
T1
Page request address Page request data Display chapter Display control (normal)
2
START START COLUMN COLUMN SC1 SC0 PRD1 PRD0
3
PRD3
4 5
- BKGND OUT BKGND OUT
- BKGND IN BKGND IN
- COR OUT COR OUT
- COR IN COR IN
- TEXT OUT TEXT OUT
A2 TEXT IN TEXT IN
A1 PON OUT PON OUT
A0 PON IN PON IN
Display 6 control (newsflash /subtitle) Display mode Active chapter Cursor row Cursor column Cursor data Device status 7 8 9 10 11 11B
STATUS CURSOR TOP ON - - - D7 - - - D6
REVEAL ON - - C5 D5 ROM VER R3
BOTTOM HALF - R4 C4 D4 ROM VER R2
DOUBLE HEIGHT CLEAR MEM. R3 C3 D3 ROM VER R1
BOX ON 24 A2 R2 C2 D2 ROM VER R0
BOX ON 1-23 A1 R1 C1 D1
BOX ON 0 A0 R0 C0 D0
625/525 ROM SYNC VER R4
DATA VCS QUALITY SIGNAL QUALITY
January 1993
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Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Notes to Table 2 1. `-' indicates a bit which does not exist and must be written to logic 0 for future compatibility.
SAA5246A
2. All bits in registers R0 to R10 are cleared to logic 0 on power-up except bits D0 and D1 of registers R1, R5 and R6 which are set to logic 1. 3. All memory is cleared to `space' (00100000) on power-up, except Row 0 Column 7 Chapter 0, which is `alpha' white (00000111) as the acquisition circuit is enabled but the page is on hold. 4. TB must be set to logic 0 for normal operation. 5. The I2C-bus slave address is 0010001. Register description R0 ADVANCED CONTROL - auto increments to Register 1 R11/R11B SELECT VCR MODE DISABLE ODD/EVEN DISABLE HDR ROLL AUTO ODD/EVEN FREE RUN PLL X24 POS Selects reading of R11 or R11B Selects short time constant of PLL when logic 1 Forces ODD/EVEN output LOW when logic 1 Disables green rolling header and time When set forces ODD/EVEN low if any TV picture displayed, if DISABLE ODD/EVEN = 0 Will force the PLL to free run in all conditions Automatic display of FASTEXT prompt row when logic 1
R1 MODE - auto increments to Register 2 T0, T1 TCS ON FFB MODE DEW/FULL FIELD EXT. PACKET ENABLE ACQ ON/OFF 7 +P/8-BIT VCS TO SCS Interlace/non-interlace 312/313 line control (see Table 4) Text composite sync or direct sync select (see Table 4 for FFB mode selection) Field-flyback or full channel mode Allocates 2K bytes memory per chapter Acquisition circuits turned off when logic 1 7 bits with parity checking or 8-bit mode When logic 1 enables display of messages with 60 Hz input signal
R2 PAGE REQUEST ADDRESS - auto increments to Register 3 HAM.CHECK COL SC0 - SC2 TB ACQ CIRCUIT BANK SELECT When logic 1 enables Hamming 8/4 checking of extension packet 27/0, 27/1 and 8/30/x Point to start column for page request data (see Table 3) Must be logic 0 for normal operation Selects one of four acquisition circuits Selects which bank of four chapters is being accessed, when EXT. PACKET ENABLE = 0
R3 PAGE REQUEST DATA - does not auto increment (see Table 3) R4 DISPLAY CHAPTER - auto increments to Register 5 determines which of the 8 pages is displayed
January 1993
23
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
R5 NORMAL DISPLAY CONTROL - auto increments to Register 6 PON TEXT COR BKGND Picture on Text on Contrast reduction on Background colour on
These functions have IN and OUT referring to inside and outside the boxing function respectively. R6 NEWSFLASH DISPLAY - auto increments to Register 7 PON TEXT COR BKGND Picture on Text on Contrast reduction on Background colour on
These functions have IN and OUT referring to inside and outside the boxing function respectively. R7 DISPLAY MODE - does not auto increment BOX ON 0 BOX ON 1-23 BOX ON 24 DOUBLE HEIGHT BOTTOM HALF REVEAL ON CURSOR ON STATUS TOP Boxing function allowed on Row 0 Boxing function allowed on Row 1-23 Boxing function allowed on Row 24 To display double height text To select bottom half of page when DOUBLE HEIGHT = 1 To reveal concealed text To display cursor Row 25 displayed above or below the main text
R8 ACTIVE CHAPTER - auto increments to Register 9 A0 to A2 CLEAR MEMORY Active chapter When set to 1, clears the display memory. This bit is automatically reset Active row for data written to or read from memory via the I2C-bus Active column for data written to or read from memory via the I2C-bus Data read from/written to memory via I2C, at location pointed to by R8, R9 and R10. This location automatically increments each time R11 is accessed
R9 CURSOR ROW - auto increments to Register 10 R0 to R4
R10 CURSOR COLUMN - auto increments to Register 11 or 11B C0 to C5
R11 CURSOR DATA - does not auto increment D0 to D7
R11B DEVICE STATUS - does not auto increment VCS SIGNAL QUALITY DATA QUALITY ROM VER R0 to R4 625/525 SYNC Indicates that the video signal quality is good and PLL is phase locked to input video when = 1 If good Teletext data is detected then = 1 Indicated language/ROM variant. See Table 6 - Table 13. If the input video is a 525 line signal when = 1
January 1993
24
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 3 Register map for page requests (R3). PRD3 HOLD PT3 PU3 X HU3 X MU3 PRD2 MAG2 PT2 PU2 X HU2 MT2 MU2
SAA5246A
START COLUMN PRD4 0 1 2 3 4 5 6 Notes to Table 3 Do care Magazine Do care Page tens Do care Page units Do care Hours tens Do care Hours units Do care Minutes tens Do care Minutes units
PRD1 MAG1 PT1 PU1 HT1 HU1 MT1 MU1
PRD0 MAG0 PT0 PU0 HT0 HU0 MT0 MU0
1. Abbreviations are as for Table 1 except for DO CARE bits. 2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page request. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, `normal' or `timed page' selection. 3. If HOLD is set LOW, the page is held and not updated 4. Columns auto-increment on successive I2C-bus transmission bytes 5. "X' = Don' t care Table 4 Interlace/non-interlace 312/313 line control and ODD/EVEN field detection option T1 0 0 1 1 T0 0 1 0 1 RESULT interlaced 312.5/312.5 lines non-interlaced 312/313 lines (note 1) non-interlaced 312/312 lines (note 1) SCS (scan composite sync) mode: FFB leading edge in first broad pulse of field M7 version onwards SCS (scan composite sync) mode: FFB leading edge in second broad pulse of field M7 version onwards
TCS ON FFB MODE x x x 0
1
1
1
Notes to Table 4 1. Reverts to interlaced mode if a newsflash or subtitle is being displayed. 2. 'x' = Don't care.
January 1993
25
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
CLOCK SYSTEMS Crystal oscillator
SAA5246A
The oscillator is a low amplitude, low distortion design operation at 27 MHz. It is capable of oscillating with both fundamental and third overtone mode crystals. External components should be used to suppress the fundamental output of the third overtone as illustrated in Fig.12. Table 5 Crystal characteristics. PARAMETER MIN. - - - - - - - - TYP. MAX. UNIT
SYMBOL
Crystal (27 MHz, 3rd overtone) C1 C0 CL Rr R1 Xa Xj Xd series capacitance parallel capacitance load capacitance resonant resistance series resistance ageing adjustment tolerance drift 1.7 5.2 20 - 20 - - - - - 50 - 5 25 25 pF pF pF 10-6/yr 10-6 10-6
handbook, full pagewidth
VDD
SAA5246A
OSCOUT CRYSTAL OSCILLATOR
1 nF
4.7 H
10 pF
15 pF 100 nF OSCIN
3.3 k
27 MHz 3rd overtone OSCGND
MLA847 - 1
Fig.12 Crystal oscillator application diagram.
January 1993
26
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Character sets
SAA5246A
The WST specification allows the selection of national character sets via the page header transmission bits, C12 to C14. The basic 96 character sets differ only in 13 national option characters as indicated in Tables 15 - 23 with reference to their table position in the basic character matrix illustrated in Table 14. The SAA5246A automatically decodes transmission bits C12 to C14. Tables 6 - 13 illustrate the character matrices. Character bytes are listed as transmitted from b1 to b7.
MLA663 handbook, full pagewidth
alphanumerics and graphics 'space' character 0000010
alphanumerics character 1011010
alphanumerics or blast-through alphanumerics character 0001001
alphanumerics character 1111111
contiguous graphics character 0110111
separated graphics character 0110111 =
separated graphics character 1111111 background colour
contiguous graphics character 1111111 display = colour
Fig.13 Character format.
January 1993
27
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 6 SAA5246AP/E character data input decoding, West European languages.
SAA5246A
B b8 handbook, full pagewidth I T S b7 b6 b5 b 4 b 3 b2 b 1 r o w 0 0 0 0 0
0 0 0 0 column 0
0 0 0 1 1 graphics black graphics red graphics green
0 or 1 0 1 0 2
0 0 1 1 2a
0 or 1 0 1 1 3
0 0 1 1 3a
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6 6a
0 1 1 1 7 7a
1 0 0 0 8
1 0 0 1 9
1 1 0 0 12
1 1 0 1 13
1 1 1 0 14
1 1 1 1 15
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
(2) (2)
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
graphics yellow
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
0
1
1
0
6
graphics cyan graphics white conceal display
(2)
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
(2)
contiguous graphics separated graphics
(1)
1
0
1
0
10
end box
1
0
1
1
11
start box
(2)
ESC
(2)
1
1
0
0
12
normal height double height
(1)
black back ground
1
1
0
1
13
new back ground hold graphics
(1) (2)
1
1
1
0
14
SO
1
1
1
1
15
SI
release graphics
MBA429
Notes for character version number (00000) see Register 11B. 1. These control characters are reserved for compatibility with other data codes. 2. These control characters are presumed before each row begins.
January 1993
28
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 7 SAA5246AP/H character data input decoding, East European languages
SAA5246A
handbook, full pagewidth B b8
I T S b7 b6 b5 b 4 b 3 b2 b 1 r o w 0 0 0 0 0
0 0 0 0 column 0
0 0 0 1 1 graphics black graphics red graphics green
0 or 1 0 1 0 2
0 0 1 0 2a
0 or 1 0 1 1 3
0 0 1 1 3a
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6 6a
0 1 1 1 7 7a
1 0 0 0 8
1 0 0 1 9
1 1 0 0 12
1 1 0 1 13
1 1 1 0 14
1 1 1 1 15
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
(2) (2)
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
graphics yellow
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
0
1
1
0
6
graphics cyan graphics white conceal display
(2)
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
(2)
contiguous graphics separated graphics
(1)
1
0
1
0
10
end box
1
0
1
1
11
start box
(2)
ESC
(2)
1
1
0
0
12
normal height double height
(1)
black back ground
1
1
0
1
13
new back ground hold graphics
(1) (2)
1
1
1
0
14
SO
1
1
1
1
15
SI
release graphics
MLA961
Notes for character version number (00001) see Register 11B 1. These control characters are reserved for compatibility with other data codes. 2. These control characters are presumed before each row begins.
January 1993
29
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 8 SAA5246AP/T character data input decoding, West European and Turkish languages.
SAA5246A
handbook, full pagewidth B b8
I T S b7 b6 b5 b 4 b 3 b2 b 1 r o w 0 0 0 0 0
0 0 0 0 column 0
0 0 0 1 1 graphics black graphics red graphics green
0 or 1 0 1 0 2
0 0 1 1 2a
0 or 1 0 1 1 3
0 0 1 1 3a
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6 6a
0 1 1 1 7 7a
1 0 0 0 8
1 0 0 1 9
1 1 0 0 12
1 1 0 1 13
1 1 1 0 14
1 1 1 1 15
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
(2) (2)
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
graphics yellow
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
0
1
1
0
6
graphics cyan graphics white conceal display
(2)
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
(2)
contiguous graphics separated graphics
(1)
1
0
1
0
10
end box
1
0
1
1
11
start box
(2)
ESC
(2)
1
1
0
0
12
normal height double height
(1)
black back ground
1
1
0
1
13
new back ground hold graphics
(1) (2)
1
1
1
0
14
SO
1
1
1
1
15
SI
release graphics
MBA431
Notes for character version number (00010) see Register 11B. 1. These control characters are reserved for compatibility with other data codes 2. These control characters are presumed before each row begins.
January 1993
30
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 9 SAA5246AP/J character data input decoding, Jugoslav languages
SAA5246A
handbook, fullBpagewidth b 8
I T S b 7 b6 b b 4 b 3 b 2 b 1 r o w 0 0 0 0 0 5
0 0 0 0 column 0
0 0 0 1 1 graphics black graphics red graphics green graphics yellow
0 or 1 0 1 0 2
0 0 1 1 2a
0 or 1 0 1 1 3
0 0 1 1 3a
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6 6a
0 1 1 1 7 7a
1 0 0 0 8
1 0 0 1 9
1 1 0 0 12
1 1 0 1 13
1 1 1 0 14
1 1 1 1 15
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
0
1
1
0
6
graphics cyan graphics white conceal display
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
contiguous graphics separated graphics
1
0
1
0
10
end box
1
0
1
1
11
start box
ESC
1
1
0
0
12
normal height double height
black back ground new back ground hold graphics release graphics
MLA962
1
1
0
1
13
1
1
1
0
14
SO
1
1
1
1
15
SI
Notes for character version number (00011) see Register 11B 1. * These control characters are reserved for compatibility with other data codes. 2. ** These control characters are presumed before each row begins.
January 1993
31
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 10 SAA5246AP/K character data input decoding, French and Arabic languages.
SAA5246A
B I T S
b8 b7 b6 b5
0 0 0 0 r o w column 0
0 0 0 1 1 graphics black graphics red graphics green
0 or 1 0 1 0 2
0 0 1 0 2a
0 or 1 0 1 1 3
0 0 1 1 3a
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6
0 or 1 1 1 0 6a
0 1 1 1 7
0 or 1 1 1 1 7a
1 0 0 0 8
1 0 0 1 9
1 1 0 0 12
1 1 0 1 13
1 1 1 0 14
1 1 1 1 15
b 4 b 3 b2 b 1
0
0
0
0
0
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
(2) (2)
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
graphics yellow
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
011 handbook, full pagewidth0
6
graphics cyan graphics white conceal display
(2)
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
(2)
contiguous graphics separated graphics
1
0
1
0
10
end box
1
0
1
1
11
start box
(2)
TWIST
(2)
1
1
0
0
12
normal height double height
(1)
black back ground
1
1
0
1
13
new back ground hold graphics
(1) (2)
1
1
1
0
14
SO
1
1
1
1
15
SI
release graphics
MLA972 - 1
Notes for character version number (00100) see Register 11B. 1. These control characters are reserved for compatibility with other data codes. 2. These control characters are presumed before each row begins.
January 1993
32
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 11 SAA5246AP/L character data input decoding, Arabic and Hebrew languages.
SAA5246A
B I T S
b8 b7 b6 b5
0 0 0 0 r o w column 0
0 0 0 1 1 graphics black graphics red graphics green
0 or 1 0 1 0 2
0 0 1 0 2a
0 or 1 0 1 1 3
0 0 1 1 3a
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6
0 or 1 1 1 0 6a
0 1 1 1 7
0 or 1 1 1 1 7a
1 0 0 0 8
1 0 0 1 9
1 1 0 0 12
1 1 0 1 13
1 1 1 0 14
1 1 1 1 15
b 4 b3 b 2 b 1
0
0
0
0
0
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
(2) (2)
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
graphics yellow
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
handbook, full 0 1 1 0 pagewidth
6
graphics cyan graphics white conceal display
(2)
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
(2)
contiguous graphics separated graphics
1
0
1
0
10
end box
1
0
1
1
11
start box
(2)
TWIST
(2)
1
1
0
0
12
normal height double height
(1)
black back ground
1
1
0
1
13
new back ground hold graphics
(1) (2)
1
1
1
0
14
SO
1
1
1
1
15
SI
release graphics
MLA963 - 1
Note for character version number (00100) see Register 11B. 1. These control characters are reserved for compatibility with other data codes. 2. These control characters are presumed before each row begins.
January 1993
33
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 12 SAA5246AP/I character data input decoding, Greek and Turkish languages.
SAA5246A
handbook, full pagewidth B b8
I T S b7 b6 b5 b 4 b 3 b 2 b1 r o w 0 0 0 0 0
0 0 0 0 column 0
0 0 0 1 1 graphics black graphics red graphics green graphics yellow
0 or 1 0 1 0 2
0 0 1 1 2a
0 or 1 0 1 1 3
0 0 1 1 3a
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6 6a
0 1 1 1 7 7a
1 0 0 0 8
1 0 0 1 9
1 1 0 0 12
1 1 0 1 13
1 1 1 0 14
1 1 1 1 15
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
0
1
1
0
6
graphics cyan graphics white conceal display
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
contiguous graphics separated graphics
1
0
1
0
10
end box
1
0
1
1
11
start box
TWIST
1
1
0
0
12
normal height double height
black back ground new back ground hold graphics release graphics
MLA964 - 1
1
1
0
1
13
1
1
1
0
14
SO
1
1
1
1
15
SI
Note for character version number (00110) see Register 11B. 1. * These control characters are reserved for compatibility with other data codes. 2. ** These control characters are presumed before each row begins.
January 1993
34
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 13 SAA5246AP/S character data input decoding, English and Thai languages.
SAA5246A
handbook, fullB pagewidth b
I T S 8 b7 b6 b5 b 4 b 3 b 2 b1 r o w 0 0 0 0 0
0 0 0 0 column 0
0 0 0 1 1 graphics black graphics red graphics green graphics yellow
0 or 1 0 1 0 2
0 0 1 1 2a
0 or 1 0 1 1 3
0 0 1 1 3a
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6 6a
0 1 1 1 7 7a
1 0 0 0 8
1 0 0 1 9
1 1 0 0 12
1 1 0 1 13
1 1 1 0 14
1 1 1 1 15
alpha numerics black alpha numerics red alpha numerics green alpha numerics yellow alpha numerics blue alpha numerics magenta alpha numerics cyan alpha numerics white flash
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
0
1
0
0
4
graphics blue graphics magenta
0
1
0
1
5
0
1
1
0
6
graphics cyan graphics white conceal display
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
steady
contiguous graphics separated graphics
1
0
1
0
10
end box
1
0
1
1
11
start box
TWIST
1
1
0
0
12
normal height double height
black back ground new back ground hold graphics release graphics
MLA965 - 1
1
1
0
1
13
1
1
1
0
14
SO
1
1
1
1
15
SI
Note For character version number (00111) see Register 11B. 1. * These control characters are reserved for compatibility with other data codes. 2. ** These control characters are presumed before each row begins.
January 1993
35
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Notes to Table 6 - 13 1. Control characters shown in Columns 0 and 1 are normally displayed as spaces. 2. Characters may be referred to by column and row, For example 2/5 refers to %. 3. Black represents displayed colour. White represents background. 4. The SAA5246A national option characters are illustrated in Table
SAA5246A
5. Characters 8/6, 8/7, 9/5, 9/6 and 9/7 are special characters for combining with character 8/5 (E, H and T codes only. Characters 5/12, 5/13, 5/14 and 5/15 are combined with 5/11 (S code only). 6. National option characters will be displayed according to the setting of control bits C12 to C14. These will be mapped into the basic code table into positions shown in Table 8. 7. Columns 2a, 3a, 6a and 7a are displayed in graphics mode.
January 1993
36
handbook, full pagewidth
January 1993
3/8 6/0 NC NC 4/0 4/8 5/0 5/8 6/8 7/0 7/8 3/9 4/1 4/9 5/1 5/9 6/1 6/9 7/1 7/9 3/10 4/2 4/10 5/2 5/10 6/2 6/10 7/2 7/10 3/11 5/11 NC 4/3 4/11 5/3 6/3 6/11 7/3 7/11 NC
Philips Semiconductors
2/0
2/8
3/0
2/1
2/9
3/1
Table 14 SAA5146A basic character matrix.
2/2
2/10
3/2
2/3
2/11
3/3
Integrated VIP and Teletext (IVT1.0)
NC
2/4 NC
2/12
3/4
3/12
4/4
4/12
5/4
5/12 6/4 6/12
7/4
7/12 NC
37
3/13 NC 4/5 4/13 5/5 5/13 6/5 6/13 3/14 4/6 4/14 5/6 5/14 NC 6/6 3/15 4/7 4/15 5/7 5/15 NC 6/7 6/15
NC
2/5
2/13
3/5
7/5
7/13 NC
2/6
2/14
3/6
7/6
7/14 NC
2/7
2/15
3/7
7/7
7/15
MLA630
Product specification
SAA5246A
Where: NC = national option character position.
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 15 SAA5246AP/E national option character set.
SAA5246A
PHCB LANGUAGE
(1)
CHARACTER POSITION (COLUMN / ROW) 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14
C12 C13 C14 2 / 3 ENGLISH 0 0 0
GERMAN
0
0
1
SWEDISH
(2)
0
1
0
ITALIAN
0
1
1
FRENCH
1
0
0
SPANISH
1
0
1
MEA559
(1) PHCB are the Page Header Control Bits. Other combinations default to English.
January 1993
38
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 16 SAA5246AP/H national option character set.
SAA5246A
andbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW) 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14
LANGUAGE C12 C13 C14 2 / 3 POLISH 0 0 0
GERMAN
0
0
1
SWEDISH
0
1
0
SERBO-CROAT
1
0
1
CZECHOSLOVAKIA
1
1
0
RUMANIAN
1
1
1
MLA966
(1) PHCB are the Page Header Control Bits. Other combinations default to German. Only the above characters change with the PHCB. All other characters in the basic set are shown in Table 14.
January 1993
39
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 17 SAA5246AP/T national option character set.
SAA5246A
andbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW) 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14
LANGUAGE C12 C13 C14 2 / 3 ENGLISH 0 0 0
GERMAN
0
0
1
TURKISH
1
1
0
ITALIAN
0
1
1
FRENCH
1
0
0
SPANISH
1
0
1
MBA430
(1) PHCB are the Page Header Control Bits. Other combinations default to English. Only the above characters change with the PHCB. All other characters in the basic set are shown in Table 14.
January 1993
40
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 18 SAA5246AP/J national option character set.
ndbook, full pagewidth
LANGUAGE C12 C13 C14 2 / 3 SERBO-CROAT LATIN SERBO-CROAT LATIN HUNGARIAN SWEDISH SERBO-CROAT LATIN SERBO-CROAT 0 1 0 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14
(1)
SAA5246A
PHCB
CHARACTER POSITION (COLUMN / ROW)
0
1
1
0
1
1
0
1
1
0
1
1
(RUMANIAN)
0
1
1
RUMANIAN SERBO-CROATIC CYRILLIC
0
1
1
1
0
0 2 0 3 4 5 6 7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MLA970
(1) PHCB are the Page Header Control Bits. Other combinations default to Serbo-Croat Latin.
January 1993
41
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 19 SAA5246AP/K national option character set.
SAA5246A
2 0
3
4
5
6
7 0
2
3
4
5
6
7
1
1
2
2
3
3
4
4
5
5
6
6
7
ndbook, full pagewidth
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
LANGUAGE
FRENCH
ARABIC
PHCB
(1) 1 0 0 1 1 1
(C12, C13, C14)
MLA968 - 1
(1) PHCB are the Page Header Control Bits. Other combinations default to French.
January 1993
42
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 20 SAA5246AP/L national option character set.
SAA5246A
2 0
3
4
5
6
7 0
2
3
4
5
6
7
1
1
2
2
3
3
4
4
5
5
6
6
7
7
ndbook, full pagewidth
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
LANGUAGE
HEBREW/ENGLISH
ARABIC
PHCB
(1) 1 0 1 1 1 1
(C12, C13, C14)
MLA967
(1) PHCB are the Page Header Control Bits. Other combinations default to Hebrew English.
January 1993
43
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 21 SAA5246AP/I national option character set.
SAA5246A
2
ndbook, full pagewidth
3
4
5
6
7 0
2
3
4
5
6
7
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
LANGUAGE
TURKISH
GREEK
PHCB
(1) 1 1 0 1 1 1
(C12, C13, C14)
MLA969 - 1
(1) PHCB are the Page Header Control Bits. Other combinations default to Turkish.
January 1993
44
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 22 SAA5246AP/S national option character set (part A).
SAA5246A
ndbook, full pagewidth 0 1
2
2a
3
3a
4
5
6
6a
7
7a
8
9
10
11
12
13
14
14a
15
15a 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
English ( 0 0 0 ) TWIST not invoked OR Thai ( 0 1 0 ) and TWIST invoked
PHCB (1) (C12 ,C 13 ,C14 )
(1) PHCB (C 12 ,C 13 ,C 14 )
MLA971a
(1) PHCB are the Page Header Control Bits. Other combinations default to English.
January 1993
45
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
Table 23 SAA5246AP/S national option character set (part B).
SAA5246A
ndbook, full pagewidth 1 0
2
2a
3
3a
4
5
6
6a
7
7a
8
9
10
11
12
13
14
14a
15
15a
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Thai ( 0 1 0 ) TWIST not invoked OR English ( 0 0 0 ) and TWIST invoked
MLA971b
(1) PHCB are the Page Header Control Bits. Other combinations default to English.
January 1993
46
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
PACKAGE OUTLINES DIP48: plastic dual in-line package; 48 leads (600 mil)
SAA5246A
SOT240-1
seating plane
D
ME
A2
A
L
A1 c Z e b1 b 48 25 MH wM (e 1)
pin 1 index E
1
24
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.9 0.19 A1 min. 0.36 0.014 A2 max. 4.06 0.16 b 1.4 1.14 0.055 0.045 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D (1) 62.60 61.60 2.46 2.42 E (1) 14.22 13.56 0.56 0.53 e 2.54 0.10 e1 15.24 0.60 L 3.90 3.05 0.15 0.12 ME 15.88 15.24 0.63 0.60 MH 18.46 15.24 0.73 0.60 w 0.254 0.01 Z (1) max. 2.1 0.083
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT240-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-25
January 1993
47
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
QFP64: plastic quad flat package; 64 leads (lead length 2.35 mm); body 14 x 20 x 2.8 mm
SOT319-3
c
y X
51 52
33 32 ZE
A
e E HE A A2 A1
Q (A 3) Lp L detail X
wM pin 1 index 64 1 wM D HD ZD B vM B 19 20 bp
e
bp
vMA
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 3.25 A1 0.30 0.10 A2 2.90 2.65 A3 0.25 bp 0.50 0.35 c 0.25 0.14 D (1) 20.1 19.9 E (1) 14.1 13.9 e 1 HD 25.0 24.4 HE 19.0 18.4 L 2.35 Lp 1.4 1.0 Q 1.4 1.2 v 0.2 w 0.2 y 0.1 Z D (1) Z E (1) 1.2 0.8 1.2 0.8 7 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT319-3 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 94-03-22 95-02-04
January 1993
48
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). SDIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. QFP REFLOW SOLDERING Reflow soldering techniques are suitable for all QFP packages. The choice of heating method may be influenced by larger plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our "Quality Reference Handbook" (order code 9397 750 00192). January 1993 49
SAA5246A
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary from 50 to 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheat for 45 minutes at 45 C. WAVE SOLDERING Wave soldering is not recommended for QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. Even with these conditions, do not consider wave soldering the following packages: QFP52 (SOT379-1), QFP100 (SOT317-1), QFP100 (SOT317-2), QFP100 (SOT382-1) or QFP160 (SOT322-1). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
SAA5246A
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
January 1993
50

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